System and method of tracking and compensating for frequency and timing offsets of modulated signals

ABSTRACT

According to an embodiment of the present disclosure, a receiver of modulated signals comprises a signal sampling unit configured to sample a signal, a zero-crossing demodulator, and a timing offset tracking unit. The zero-crossing demodulator includes: a zero-crossing counter configured to determine a number of zero crossings for each pulse of the signal, and a symbol selector configured to decode a sequence of pulses as a symbol based on the number of zero crossings in the sequence of pulses. The timing offset tracking unit is configured to: calculate a metric based on an accumulation of the number of zero crossings and corresponding pulse values of the decoded symbol, compare the metric to a predetermined threshold value, and compensate a timing offset of the signal by causing the signal sampling unit to sample the signal at an earlier interval or a later interval in response to the comparison.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to and the benefit of U.S. ProvisionalPatent Application No. 62/450,268, titled “APPARATUS AND METHOD FORROBUST TIMING AND FREQUENCY OFFSET TRACKING OF RECEIVERS WITH PHASESHIFT KEYING (PSK) MODULATION” and filed on Jan. 25, 2017, the entirecontent which is incorporated herein by reference.

RELATED FIELD

The present disclosure relates to wireless communications systems. Inparticular, the present disclosure relates to a system and method oftracking and compensating frequency and timing offsets of modulatedsignals.

BACKGROUND

In a baseband wireless modem design, symbol timing and initial frequencyoffsets are often accounted for during initial signal acquisition.However, due to differences between transmitter and receiver clockfrequencies, timing and frequency errors may continue to accumulate overthe duration of a data packet transfer. For longer packets, theuncorrected timing and frequency offsets accumulated throughout thepacket transfer may severely degrade the receiver performance.

For example, according to the IEEE 802.15.4 specification, which is abasis for ZigBee's specification, the OQPSK physical layer (PHY) symbolrate is 25 ksymbol/s when operating in the 868 MHz band and 62.5ksymbol/s when operating in the 780 MHz, 915 MHz, or 2450 MHz band withan accuracy of ±40 parts per million (ppm). OQPSK stands for offsetquadrature phase-shift keying. ZigBee's OQPSK is a form of continuousphase frequency shift keying (CPFSK) modulation in which theinstantaneous frequency is binary f_(k)=±Δf , whereas the instantaneousfrequency for CPFSK generally may be f_(k)=±Δf, ±3Δf, . . . Under CPFSK,each symbol has a fixed duration, and the phase from one symbol to asubsequent symbol maintains continuity.

If the transmit clock and receive clock have an accuracy within 40 ppmbut in opposite direction, it is equivalent to the receiver experiencing80 ppm offset. Hence, the maximum frequency offset possible is about 2.4GHz*80/1M=192 kHz or just about 200 kHz. In addition, the maximum PSDUsize is 128 octets, which is equivalent to 256 symbols and 8192 chips (achip generally refers to a pulse of a direct-sequence spread spectrum(DSSS) code). Thus, in this extreme case, the total timing drift by theend of the packet is 8192 chips * 80/1e6˜0.66 chips. An offset of morethan half a chip can be devastating to the OQPSK demodulationperformance.

SUMMARY

According to an embodiment of the present disclosure, a receiver ofmodulated signals comprises a signal sampling unit configured to samplea signal, a zero-crossing demodulator, and a timing offset trackingunit. The zero-crossing demodulator includes: a zero-crossing counterconfigured to determine a number of zero crossings for each pulse of thesignal, and a symbol selector configured to decode a sequence of pulsesas a symbol based on the number of zero crossings in the sequence ofpulses. The timing offset tracking unit is configured to: calculate ametric based on an accumulation of the number of zero crossings andcorresponding pulse values of the decoded symbol, compare the metric toa predetermined threshold value, and compensate a timing offset of thesignal by causing the signal sampling unit to sample the signal at anearlier interval or a later interval in response to the comparison.

According to another embodiment of the present disclosure, a receiver ofmodulated signals comprises: a signal mixer configured to performbaseband down-conversion of a signal according to a mixer frequency, azero-crossing demodulator, and a frequency offset tracking unit. Thezero-crossing demodulator includes: a zero-crossing counter configuredto determine a number of zero crossings for each pulse of the signal,and a symbol selector configured to decode a sequence of pulses as asymbol based on the number of zero crossings in the sequence of pulses.The frequency offset tracking unit is configured to: calculate afrequency offset based on an accumulation of the number of zerocrossings, and compensate a frequency offset of the signal by causingthe signal mixer unit to increase or decrease the mixer frequencyaccording to the calculated frequency offset.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included as part of the presentdisclosure, illustrate various embodiments and together with the generaldescription given above and the detailed description of the variousembodiments given below serve to explain and teach the principlesdescribed herein.

FIG. 1 illustrates an exemplary diagram of a zero-crossing demodulator(ZCD), a timing offset tracking unit and a frequency offset trackingunit, according to an embodiment.

FIG. 2 illustrates an exemplary flowchart of the timing offset tracker,according to an embodiment.

FIG. 3 illustrates an exemplary flowchart of the timing offset tracker,according to another embodiment.

FIG. 4 illustrates an exemplary flowchart of the frequency offsettracker, according to an embodiment.

The figures in the drawings are not necessarily drawn to scale andelements of similar structures or functions are generally represented bylike reference numerals for illustrative purposes throughout thefigures. The figures are only intended to facilitate the description ofthe various embodiments described herein and do not describe everyaspect of the teachings disclosed herein and do not limit the scope ofthe claims.

DETAILED DESCRIPTION

Each of the features and teachings disclosed herein may be utilizedseparately or in conjunction with other features and teachings toprovide the present system and method. Representative examples utilizingmany of these features and teachings, both separately and incombination, are described with reference to the attached figures. Whilethe detailed description herein illustrates to a person of ordinaryskill in the art further details for practicing aspects of the presentteachings, it does not limit the scope of the claims. Therefore,combinations of features disclosed in the detailed description arerepresentative examples of the present teachings and may not benecessary to practice the teachings in the broadest sense.

The present system and method of tracking and compensating for timingand frequency offsets are applicable to wireless communication systemsincluding, but not limited to, ZigBee, IEEE 802.15.4, and OQPSKcommunications systems. In general, the present system and methodprovide data-aided timing offset (TO) and frequency offset (FO) trackingwhere no known sequence (e.g., preamble) is present.

According to one embodiment, the present system and method provide alow-complexity timing and frequency offset tracking technique based onthe output of zero-crossing counters. Low complexity is achieved becausezero-crossing counters are generally already implemented as part of thedemodulation scheme for ZigBee. Thus, by reusing the demodulationoutputs for TO and FO tracking, less circuitry may be required.Furthermore, by exploiting the basic properties of chip distribution,the present system and method provide a TO metric and a FO metric thatare used to determine timing and frequency offset compensation.

FIG. 1 illustrates an exemplary diagram of a zero-crossing demodulator(ZCD), a timing offset tracking unit and a frequency offset trackingunit, according to an embodiment. The ZCD includes a phase axisgenerator 101, a hard limiter 102, one or more zero-crossing detectors103, a zero-crossing counter 104, a chip correlator 105, and a symbolselector 106. Although FIG. 1 shows these components as separatecomponents, one or more of these components may be combined.

The phase axis generator 101 receives in-phase and quadrature-phasecomponents of a down-converted OQPSK signal, i.e., i(t) and q(t) from adigital signal mixer 110, which is configured to perform basebanddown-conversion of a sampled signal (e.g., an RF signal in the case of azero-IF receiver) according to a mixer frequency. The phase axisgenerator 101 generates M phase axes:

i _(m)(t)=i(t)cos(θ_(m))+q(t)sin(θ_(m))

q _(m)(t)=−i(t)sin(θ_(m))+q(t)cos(θ_(m))

form m ∈ {1, . . . ,M}. That is, the phase axis generator 101 performsPark transformation on the signal components to generate a plurality oftransformed signals each with respect to a different set of phase axes,and the number of zero crossings for each pulse is determined as a sumof zero crossings over the plurality of transformed signals. Two summersand two scalers with i(t) and q(t) may be required for any phase axispair. It is considered that θ_(m), m ∈ {1, . . . , M} are uniformlyspaced in the interval

$\left\lbrack {0,\frac{\pi}{2}} \right).$

The hard limiter 102 performs a function as follows for input x:

${\hat{f}(x)} = \left\{ \begin{matrix}{1,} & {x \geq 0} \\{{- 1},} & {x < 0}\end{matrix} \right.$

Each zero-crossing detector 103 takes a pair of signals, i_(m)(t) andq_(m)(t), from the phase axis generator output, and detectszero-crossings (i.e., phase axis-crossing time points) and thephase-rotation direction of each crossing. If the i_(m)(t) signalchanges value from positive to negative and the value of q_(m)(t) at thecrossing time is negative, then the m-th zero-crossing detector 103generates a negative pulse at the crossing time to indicate that theestimated phase rotation is in a clockwise direction, and vice versa.The output of the m-th zero-crossing detector 103 employing i_(m)(t) andq_(m)(t), denoted by D_(m)(t), can be written as:

${D_{m}(t)} = {{\frac{1}{2}\left( {{{{\hat{\iota}}_{m}(t)}\left( {{{\hat{q}}_{m}(t)} - {{\hat{q}}_{m}\left( {t - 1} \right)}} \right)} - {{{\hat{q}}_{m}(t)}\left( {{{\hat{\iota}}_{m}(t)} - {{\hat{\iota}}_{m}\left( {t - 1} \right)}} \right)}} \right)} = {\frac{1}{2}\left( {{{{\hat{\iota}}_{m}\left( {t - 1} \right)}{{\hat{q}}_{m}(t)}} - {{{\hat{\iota}}_{m}(t)}{{\hat{q}}_{m}\left( {t - 1} \right)}}} \right)}}$

where t refers to the sample index. The output D_(m)(t) of the m-thzero-crossing detector belongs to the set {−1,0,1}. In particular,−1, 0and 1 are mapped to clockwise crossing, no crossing, and counterclockwise crossing, respectively.

At the start of any OQPSK symbol, i.e., the beginning of each chipduration Tc, the zero-crossing counter is reset to zero. Thezero-crossing counter 104 keeps adding the outputs of the zero-crossingdetectors 103, and generates the summation result at the end of thesymbol as the output. In particular, consider an oversampling of OSRsamples per chip. The total number of OSR×M samples associated with chipindex k is as follows:

$z_{k} = {\sum\limits_{t = 0}^{{OSR} - 1}{\sum\limits_{m = 1}^{M}{D_{m}\left( {t,k} \right)}}}$

where D_(m)(t, k) is the zero-crossing count of sample t phase axis mduring chip k. The summation result z_(k) is the total count of zerocrossings per chip, summed over all the samples and phase axes over thechip duration, and is fed into the chip correlator 105. Thus, thezero-crossing counter determines a total number of zero crossings foreach chip or pulse. A higher magnitude of z_(k) corresponds to a higherconfidence that a first sample transitioned to a second sample in aparticular direction.

A chip generally refers to a pulse of a direct-sequence spread spectrum(DSSS) code. For example, each data symbol of a signal may be mappedinto one of sixteen 32-chip pseudo-random noise (PN) sequences, such asspecified in Table below. The PN sequences are related to each otherthrough cyclic shifts and/or conjugation (i.e., inversion of odd-indexedchip values).

TABLE 1 Example Symbol-to-Chip mapping Data Symbol Chip Values (c₀c₁ . .. c₃₀c₃₁)  0 1 1 0 1 1 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 0 1 0 0 0 1 0 1 11 0  1 1 1 1 0 1 1 0 1 1 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 0 1 0 0 0 1 0 2 0 0 1 0 1 1 1 0 1 1 0 1 1 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 0 1 0  3 00 1 0 0 0 1 0 1 1 1 0 1 1 0 1 1 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1  4 0 1 0 10 0 1 0 0 0 1 0 1 1 1 0 1 1 0 1 1 0 0 1 1 1 0 0 0 0 1 1  5 0 0 1 1 0 1 01 0 0 1 0 0 0 1 0 1 1 1 0 1 1 0 1 1 0 0 1 1 1 0 0  6 1 1 0 0 0 0 1 1 0 10 1 0 0 1 0 0 0 1 0 1 1 1 0 1 1 0 1 1 0 0 1  7 1 0 0 1 1 1 0 0 0 0 1 1 01 0 1 0 0 1 0 0 0 1 0 1 1 1 0 1 1 0 1  8 1 0 0 0 1 1 0 0 1 0 0 1 0 1 1 00 0 0 0 0 1 1 1 0 1 1 1 1 0 1 1  9 1 0 1 1 1 0 0 0 1 1 0 0 1 0 0 1 0 1 10 0 0 0 0 0 1 1 1 0 1 1 1 10 0 1 1 1 1 0 1 1 1 0 0 0 1 1 0 0 1 0 0 1 0 11 0 0 0 0 0 0 1 1 1 11 0 1 1 1 0 1 1 1 1 0 1 1 1 0 0 0 1 1 0 0 1 0 0 1 01 1 0 0 0 0 0 12 0 0 0 0 0 1 1 1 0 1 1 1 1 0 1 1 1 0 0 0 1 1 0 0 1 0 0 10 1 1 0 13 0 1 1 0 0 0 0 0 0 1 1 1 0 1 1 1 1 0 1 1 1 0 0 0 1 1 0 0 1 0 01 14 1 0 0 1 0 1 1 0 0 0 0 0 0 1 1 1 0 1 1 1 1 0 1 1 1 0 0 0 1 1 0 0 151 1 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 1 1 1 0 1 1 1 1 0 1 1 1 0 0 0The term “chip” and “pulse” are used interchangeably herein forconvenience of description. Although the chip values in Table 1 areshown as having a value of 0 or 1, the chip values may alternativelyhave a value of -1 or 1, depending on usage.

The chip correlator 105 provides one of a hard chip correlation and asoft chip correlation, and the symbol selector 106 decodes a sequence ofthe chips as a symbol based on the number of zero crossings in thesequence. For hard chip correlation, the hard chip correlator 105 maydetermine the sign of z_(k) for each chip k, and then performcorrelation of this sign signal with a reference sequence b(j, k) for j∈ {0,1,...,15}:

${{\hat{c}}_{H}(t)} = {{SymbolToChip}\left( {\underset{j \in {\{{0,1,\ldots,15}\}}}{argmin}\left( {\sum\limits_{k}{{{b\left( {j,k} \right)} - {{sign}\left( z_{k} \right)}}}} \right)} \right)}$

In other words, the chip correlator 105 finds a closest match among aplurality of reference sequences b(j, k) to zero crossings of thesequence of pulses (e.g., based on a minimum sum of differences), andthe symbol selector 106 selects the symbol corresponding to the closestmatch reference sequence b(j, k).

The difference between the soft chip correlator and the hard correlatoris that the value z_(k), which contains the soft information of zerocrossing counts of the chip sequence, is used for correlation:

${{\hat{c}}_{S}(t)} = {{SymbolToChip}\left( {\underset{j \in {\{{0,1,\ldots,15}\}}}{\arg \; \min}\left( {\sum\limits_{k}{{{b\left( {j,k} \right)} - \frac{z_{k}}{a}}}} \right)} \right)}$

The design parameter α is the normalization factor. For an oversamplingrate of 32 MHz and M=8 phase axis, α=4 may be a good candidate.

A TO tracker 107 receives the output z_(k), which is the zero-crossingscount, from the zero-crossing counter 104 and the chip values q_(k) ofthe decoded symbol from the symbol selector 106, and determines whetherthe sampling is early or late. In particular, the TO tracker 107calculates a metric based on an accumulation of the number of zerocrossings and corresponding chip values of the decoded symbol, andcompares the metric to a predetermined threshold value. Based on theresults of the comparison, the TO tracker 108 compensates a timingoffset of the signal by causing a sampling unit 109 to sample the signalat an earlier interval or a later interval.

A FO tracker 108 also receives the output z_(k) from the zero-crossingcounter 104 and calculates a frequency offset based on an accumulationof the number of zero crossings. The FO tracker 108 compensates afrequency offset of the signal by causing the digital signal mixer 110to increase or decrease the mixer frequency according to the calculatedfrequency offset.

FIG. 2 illustrates an exemplary flowchart of the timing offset tracker,according to an embodiment. The TO tracker 107 delays input values z_(k)and q_(k) through delay elements 201 (e.g., via flip flop) to generatevalues z_(k−1) and q_(k−1). The TO tracker 107 maintains an earlycorrelation counter (ECC) by passing values z_(k−1) and q_(k) through amultiplier 202 and then accumulating the product via an accumulationunit 203. The TO tracker 107 also maintains a late correlation counter(LCC) by passing values z_(k) and q_(k−1) through a multiplier 202 andthen accumulating the product via an accumulation unit 203. The ECC andLCC may be mathematically represented as:

$\begin{matrix}{{ECC} = {\sum\limits_{k = 1}^{L - 2}{z_{k - 1}q_{k}}}} \\{{LCC} = {\sum\limits_{k = 1}^{L - 2}{z_{k}q_{k - 1}}}}\end{matrix}$

where k represents a chip index of a corresponding chip in the decodedsequence of chips, L represents the number of chips per symbol, zrepresents the number of zero crossings of a corresponding chip, and qrepresents a chip value, +1 or −1, of a corresponding chip in thedecoded symbol.

The TO tracker 107 calculates a metric by subtracting the LCC value fromthe ECC value via a subtraction unit 204:

metric=ECC−LCC

The TO tracker 107 may smooth the metric, for example, via an infiniteimpulse response (IIR) filter 205. The TO tracker 107 compares themetric to a predefined threshold Thr via comparators 206 and 207. If thevalue of the metric exceeds the value of Thr such that metric>Thr (at206), the TO tracker 107 may determine that the sampling is late andtrigger the timing adjustment go back one sample (at 208). For example,the TO tracker 107 may adjust the sampling unit 109 to sample the signalat an earlier interval. If the value of the metric exceeds the value ofThr in the opposite direction such that metric <−Thr, the TO tracker 107may determine that the sampling is early and trigger the timingadjustment to skip one sample (at 209). For example, the TO tracker 107may adjust the sampling unit 109 to sample the signal at a laterinterval. The metric is reset to zero after an adjustment (at 210).Accordingly, if the metric exceeds a specific threshold value, thepresent system declares an early or late event.

FIG. 3 illustrates an exemplary flowchart of the timing offset tracker,according to another embodiment. The embodiment of FIG. 3 issubstantially similar to that of FIG. 2 but differs in that the TOtracker 107 includes additional elements 301, 302, 303 and 304, andcalculates the metric as a weighted sum:

metric=(1−α)M _(prev)+α(ECC−LCC),

where M_(prev) is the metric for the previously decoded symbol and a isa weight value ∈0≤α≤1.

The ECC equation may be derived by letting q _(k), be the actual k-thchip output and making the following two assumptions:

(A1) Chip-correlation output is error-free (i.e., q_(k)=q _(k))

(A2) Within a symbol, the instance of q _(k)=q _(k+1) and q _(k)≠q_(k+1) are equally distributed.

If sampling is late, and q _(k)≠q _(k+1), then |z_(k)| should be smallerthan ideal due to incorrect sampling. If q _(k)=q _(k+1), then |z_(k)|should be unaffected by sampling error. Thus, the amount of offset awayfrom the ideal sampling position can be modeled as:

${ECC} = {\frac{1}{2}\left\lbrack {\frac{\sum\limits_{k = 0}^{L - 3}{{z_{k}}I\left\{ {{\overset{\_}{q}}_{k} = {\overset{\_}{q}}_{k + 1}} \right\}}}{\sum\limits_{k = 0}^{L - 3}{I\left\{ {{\overset{\_}{q}}_{k} = {\overset{\_}{q}}_{k + 1}} \right\}}} - \frac{\sum\limits_{k = 0}^{L - 3}{{z_{k}}I\left\{ {{\overset{\_}{q}}_{k} \neq {\overset{\_}{q}}_{k + 1}} \right\}}}{\sum\limits_{k = 0}^{L - 3}{I\left\{ {{\overset{\_}{q}}_{k} \neq {\overset{\_}{q}}_{k + 1}} \right\}}}} \right\rbrack}$

where I(x) is an indicator function that has value of 1 if condition istrue and 0 otherwise. L=32 is the length of a symbol in chips. With(A1), |z_(k)|=z_(k) q _(k), the indicator function may be replaced by:

${{I\left\{ {{\overset{\_}{q}}_{k} = {\overset{\_}{q}}_{k + 1}} \right\}} = \frac{1 + {{\overset{\_}{q}}_{k}{\overset{\_}{q}}_{k + 1}}}{2}},{{I\left\{ {{\overset{\_}{q}}_{k} \neq {\overset{\_}{q}}_{k + 1}} \right\}} = \frac{1 - {{\overset{\_}{q}}_{k}{\overset{\_}{q}}_{k + 1}}}{2}}$

With (A2),

$\frac{\sum\limits_{k = 0}^{L - 3}{{z_{k}}\left( {{I\left\{ {{\overset{\_}{q}}_{k} = {\overset{\_}{q}}_{k + 1}} \right\}} - {I\left\{ {{\overset{\_}{q}}_{k} \neq {\overset{\_}{q}}_{k + 1}} \right\}}} \right)}}{L - 2} = {\frac{\sum\limits_{k = 0}^{L - 3}{{z_{k}}{\overset{\_}{q}}_{k}{\overset{\_}{q}}_{k + 1}}}{L - 2} = {\frac{1}{L - 2}{\sum\limits_{k = 0}^{L - 3}{z_{k}{\overset{\_}{q}}_{k + 1}}}}}$

By applying the identities on ECC, the following is derived:

${\sum\limits_{k = 0}^{L - 3}{I\left\{ {{\overset{\_}{q}}_{k} = {\overset{\_}{q}}_{k + 1}} \right\}}} = {{\sum\limits_{k = 0}^{L - 3}{I\left\{ {{\overset{\_}{q}}_{k} \neq {\overset{\_}{q}}_{k + 1}} \right\}}} = {\frac{L - 2}{2}.}}$

which is the same as the present metric. A similar derivation may beperformed for LCC.

FIG. 4 illustrates an exemplary flowchart of the frequency offsettracker, according to an embodiment. The FO tracker 108 receives thezero-crossing count z_(k) (at 401). The FO tracker 108 determineswhether z_(k) corresponds to the end of a symbol by performing modulo ofthe index k with the symbol length L (at 402). In this case, L=32, andthe FO tracker 108 determines whether k % 32=0. If k % 32≠0, the FOtracker 108 further determines whether k % 32=any of {4, 5, 9, 20 and28} (at 403). If k % 32=any of {4, 5, 9,20 and 28}, the FO tracker 108proceeds back to 401 to analyze the next value z_(k+1). If k % 32≠any of{4, 5, 9, 20 and 28}, the FO tracker 108 accumulates z_(k) as a sumΣZ_(K) (at 404) and then proceeds back 401 to analyze the next valuez_(k+1).

When the FO tracker 108 determines that the end of the symbol is reached(i.e., k % 32=0), the FO tracker proceeds to 405 to calculate thefrequency offset estimate {circumflex over (f)}_(o) as:

${\hat{f}}_{o} = {\gamma\left\lbrack {\left( {\sum\limits_{k = 1}^{L}{I_{k}z_{k}}} \right) - {bias}} \right\rbrack}$

where k represents a chip index of a corresponding chip in the decodedsequence of chips, L represents a number of chips per symbol, zrepresents the number of zero crossings of a corresponding chip, Irepresents an indicator function having a value of 0 or 1 according tok, and bias and γ represent design parameters. In the case shown,I_(k)=0 for k ∈ {0, 4, 5, 9, 20 and 28} and I_(k)=0 otherwise.

In other words, the FO tracker 108 calculates the frequency offsetestimate {circumflex over (f)}_(o) based on an accumulation of thenumber of zero crossings. In this case, the FO tracker 108 accumulatesthe number of zero crossings over only a subset of the chips per symbol,as provided by the indicator function I_(k). The digital signal mixer110 may receive the frequency offset estimate {circumflex over (f)}_(o)and increase or decrease the mixer frequency according to the frequencyoffset estimate {circumflex over (f)}_(o).

The above frequency offset estimate {circumflex over (f)}_(o) may bederived by taking advantage of a special property of the referencesequences b(j, k) in which:

${\sum\limits_{\underset{k \notin {\{{0,4,5,9,20,28}\}}}{k}}{b\left( {j,k} \right)}} = \left\{ \begin{matrix}{1,} & {j \in \left\{ {0,1,\ldots \mspace{14mu},7} \right\}} \\{{- 1},} & {j \in \left\{ {8,9,\ldots \mspace{14mu},15} \right\}}\end{matrix} \right.$

where j represents a symbol index and k represents a value index in thereference sequence. When the frequency offset is zero, the signal z_(k)is a scaled version of the transmitted sequence, which should correspondto one of the reference sequences b(j, k):

z _(k) =C.b(j, k)+γ·f _(o)

where C is a constant representing the maximum zero-crossing counteroutput, b(j, k) is the reference sequence associated with transmittedsymbol j, f_(o) is the frequency offset and the constant γ is thescaling factor.

Then, by applying the special property of the reference sequences b(j,k), a truncated sum for estimating the frequency offset is provided as:

${\hat{f}}_{o} = {\frac{1}{26 \cdot \gamma} \times {\sum\limits_{\underset{k \notin {\{{0,4,5,9,20,28}\}}}{k}}z_{k}}}$

An estimation bias removal term may be further subtracted from thefrequency offset estimate {circumflex over (f)}_(o) in some embodiments.

The summation of the references sequences b(j, k) without truncationresults in:

$\left( {\sum\limits_{k}{b\left( {j,k} \right)}} \right) \in \left\{ {{\pm 3},{\pm 5}} \right\}$

Thus, by applying a specially designed indicator function I_(k) thattakes advantage of the above-discussed property of the referencesequences b(j, k), the present system and method provide an estimationerror that is significantly reduced.

Accordingly, in view of the foregoing, embodiments of the presentdisclosure provide TO tracking and FO tracking by using zero crossingsof decoded chips to accumulate a metric. For TO tracking, the presentsystem further determines ECC and LCC values, and uses the differencebetween ECC and LCC values as a metric. Also, TO tracking as describedherein may function with taking as little one sample per chip and doesnot require knowledge of phase information. For FO tracking, the presentsystem further provides bias removal, and calculates a frequency offsetestimate by accumulating the zero crossings for only a subset of thechips per symbol, thereby significantly reducing an estimation error.

Various embodiments of the present system and method may be implementedusing hardware elements, software elements, or a combination of both.Examples of hardware elements may include processors, microprocessors,circuits, circuit elements (e.g., transistors, resistors, capacitors,inductors, and so forth), integrated circuits, application specificintegrated circuits (ASIC), programmable logic devices (PLD), digitalsignal processors (DSP), field programmable gate array (FPGA), logicgates, registers, semiconductor device, chips, microchips, chip sets,and so forth. Examples of software may include software components,programs, applications, computer programs, application programs, systemprograms, machine programs, operating system software, middleware,firmware, software modules, routines, subroutines, functions, methods,procedures, software interfaces, application program interfaces (API),instruction sets, computing code, computer code, code segments, computercode segments, words, values, symbols, or any combination thereof.Determining whether an embodiment is implemented using hardware elementsand/or software elements may vary in accordance with any number offactors, such as desired computational rate, power levels, heattolerances, processing cycle budget, input data rates, output datarates, memory resources, data bus speeds and other design or performanceconstraints.

One or more aspects of at least one embodiment may be implemented byrepresentative instructions stored on a machine-readable medium whichrepresents various logic within the processor, which when read by amachine causes the machine to fabricate logic to perform the techniquesdescribed herein. Such representations, known as “IP cores” may bestored on a tangible, machine readable medium and supplied to variouscustomers or manufacturing facilities to load into the fabricationmachines that actually make the logic or processor.

While certain features set forth herein have been described withreference to various implementations, this description is not intendedto be construed in a limiting sense. Hence, various modifications of theimplementations described herein, as well as other implementations,which are apparent to persons skilled in the art to which the presentdisclosure pertains are deemed to lie within the spirit and scope of thepresent disclosure.

The foregoing description, for purpose of explanation, has beendescribed with reference to specific embodiments. However, theillustrative discussions above are not intended to be exhaustive or tolimit the scope of the claims to the precise forms disclosed. Manymodifications and variations are possible in view of the aboveteachings. The embodiments were chosen in order to best explain theprinciples underlying the claims and their practical applications, tothereby enable others skilled in the art to best use the embodimentswith various modifications as are suited to the particular usescontemplated.

1. A receiver of modulated signals, the receiver comprising: a signalsampling unit configured to sample a signal; a zero-crossing demodulatorincluding: a zero-crossing counter configured to determine a number ofzero crossings for each pulse of the signal, and a symbol selectorconfigured to decode a sequence of pulses as a symbol based on thenumber of zero crossings in the sequence of pulses; and a timing offsettracking unit configured to: calculate a metric based on an accumulationof the number of zero crossings and corresponding pulse values of thedecoded symbol, compare the metric to a predetermined threshold value,and compensate a timing offset of the signal by causing the signalsampling unit to sample the signal at an earlier interval or a laterinterval in response to the comparison.
 2. The receiver of claim 1,wherein the zero-crossing demodulator further comprises a pulsecorrelator configured to find a closest match among a plurality ofreference sequences to zero crossings of the sequence of pulses, and thesymbol selector is configured to select the symbol corresponding to theclosest match reference sequence.
 3. The receiver of claim 2, wherein tocalculate the metric includes calculating an early correlation counter(ECC) as: ${{ECC} = {\sum\limits_{k = 1}^{L - 2}{z_{k - 1}q_{k}}}},$where k represents a pulse index of a corresponding pulse in the decodedsequence of pulses, L represents the number of pulses in the symbol, zrepresents the number of zero crossings of a corresponding pulse, and qrepresents a pulse value, +1 or −1, of a corresponding pulse in thedecoded symbol.
 4. The receiver of claim 3, wherein to calculate themetric includes calculating a late correlation counter (LCC) as:${{LCC} = {\sum\limits_{k = 1}^{L - 2}{z_{k}q_{k - 1}}}},$ where krepresents a pulse index of a corresponding pulse in the decodedsequence of pulses, L represents the number of pulses in the symbol, zrepresents the number of zero crossings of a corresponding pulse, and qrepresents a pulse value, +1 or −1, of a corresponding pulse in thedecoded symbol.
 5. The receiver of claim 4, wherein the metric iscalculated as:metric=ECC−LCC
 6. The receiver of claim 4, wherein the metric iscalculated as a weighted sum:metric=(1−α)M _(prev)+α(ECC−LCC), where M_(prev) is the metric for aprevious symbol and a is a weight value ∈0≤α≤1.
 7. The receiver of claim4, wherein the timing offset tracking unit causes the sampling unit tosample the signal at an earlier interval in response to a comparisonresult in which:metric>Thr, where Thr is the predetermined threshold value.
 8. Thereceiver of claim 7, wherein the timing offset tracking unit causes thesampling unit to sample the signal at a later interval in response to acomparison result in which:metric<−Thr, where Thr is the predetermined threshold value.
 9. Thereceiver of claim 7, wherein the zero-crossing demodulator furtherincludes a phase axis generator configured to perform Parktransformation on the signal to generate a plurality of transformedsignals each with respect to a different set of phase axes.
 10. Thereceiver of claim 9, wherein the number of zero crossings for each pulseis determined as a sum of zero crossings over the plurality oftransformed signals.
 11. The receiver of claim 1, wherein the receiveris a ZigBee compliant receiver.
 12. A receiver of modulated signals, thereceiver comprising: a signal mixer configured to perform basebanddown-conversion of a signal according to a mixer frequency; azero-crossing demodulator including: a zero-crossing counter configuredto determine a number of zero crossings for each pulse of the signal; asymbol selector configured to decode a sequence of pulses as a symbolbased on the number of zero crossings in the sequence of pulses, and aphase axis generator configured to perform Park transformation on thesignal to generate a plurality of transformed signals each with respectto a different set of phase axes; and a frequency offset tracking unitconfigured to: calculate a frequency offset based on an accumulation ofthe number of zero crossings, and compensate a frequency offset of thesignal by causing the signal mixer unit to increase or decrease themixer frequency according to the calculated frequency offset.
 13. Thereceiver of claim 12, wherein the frequency offset {circumflex over(f)}_(o) is calculated as:${{\hat{f}}_{o} = {\gamma\left\lbrack {{\sum\limits_{k = 0}^{L - 1}{I_{k}z_{k}}} - {bias}} \right\rbrack}},$where k represents a pulse index of a corresponding pulse in the decodedsequence of pulses, L represents a number of pulses per symbol, zrepresents the number of zero crossings of a corresponding pulse, Irepresents an indicator function having a value of 0 or 1 according tok, and bias and γ represent design parameters.
 14. The receiver of claim13, wherein I_(k)=0 for k ∈{0, 4, 5, 9, 20, 28} and I_(k)=1 otherwise.15. The receiver of claim 12, wherein the accumulation of the number ofzero crossings is accumulated over only a subset of the pulses persymbol.
 16. The receiver of claim 12, wherein the zero-crossingdemodulator further comprises a pulse correlator configured to find aclosest match among a plurality of reference sequences to zero crossingsof the sequence of pulses, and the symbol selector is configured toselect the symbol corresponding to the closest match reference sequence.17. The receiver of claim 16, wherein there are sixteen referencesequences b(j, k) for j ∈ {0, . . . , 15}, and the reference sequenceshave the following property:${\sum\limits_{\underset{k \notin {\{{0,4,5,9,20,28}\}}}{k}}{b\left( {j,k} \right)}} = \left\{ {\begin{matrix}{1,} & {j \in \left\{ {0,1,\ldots \mspace{14mu},7} \right\}} \\{{- 1},} & {j \in \left\{ {8,9,\ldots \mspace{14mu},15} \right\}}\end{matrix},} \right.$ where j represents a symbol index and krepresents a value index in a reference sequence.
 18. (canceled)
 19. Thereceiver of claim 12, wherein the number of zero crossings for eachpulse is determined as a sum of zero crossings over the plurality oftransformed signals.
 20. The receiver of claim 12, wherein the receiveris a ZigBee compliant receiver.
 21. A receiver of modulated signals, thereceiver comprising: a signal mixer configured to perform basebanddown-conversion of a signal according to a mixer frequency; azero-crossing demodulator including: a zero-crossing counter configuredto determine a number of zero crossings for each pulse of the signal,and a symbol selector configured to decode a sequence of pulses as asymbol based on the number of zero crossings in the sequence of pulses;and a frequency offset tracking unit configured to: calculate afrequency offset based on an accumulation of the number of zerocrossings, and compensate a frequency offset of the signal by causingthe signal mixer unit to increase or decrease the mixer frequencyaccording to the calculated frequency offset, wherein the frequencyoffset {circumflex over (f)}_(o) is calculated as:${{\hat{f}}_{o} = {\gamma\left\lbrack {{\sum\limits_{k = 0}^{L - 1}{I_{k}z_{k}}} - {bias}} \right\rbrack}},$where k represents a pulse index of a corresponding pulse in the decodedsequence of pulses, L represents a number of pulses per symbol, zrepresents the number of zero crossings of a corresponding pulse, Irepresents an indicator function having a value of 0 or 1 according tok, and bias and γ represent design parameters.